Datasheet

Chapter 5. Debug Support 5-47
Processor Status, DDATA Definition
The move-to-SR and RTE instructions include an optional PST = 0x3 value, indicating an
entry into user mode. Additionally, if the execution of a RTE instruction returns the
processor to emulator mode, a multiple-cycle status of 0xD is signaled.
Similar to the exception processing mode, the stopped state (PST = 0xE) and the halted
state (PST = 0xF) display this status throughout the entire time the ColdFire processor is in
the given mode.
movec Ry,Rc PST = 0x1
rte PST = 0x7, {PST = 0xB, DD = source operand}, {PST = 3}, { PST = 0xB,
DD = source operand},
PST = 0x5, {[PST = 0x9AB], DD = target address}
stop #imm PST = 0x1,
PST = 0xE
wdebug <ea>y PST = 0x1, {PST = 0xB, DD = source, PST = 0xB, DD = source}
Table 5-23. PST/DDATA Specification for Supervisor-Mode Instructions
Instruction Operand Syntax PSTDDATA
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