Datasheet

Chapter 10. Chip-Select Module 10-5
Chip-Select Registers
be programmed to continue decoding for a range of addresses after the CSMR0[V] is set,
after which the global chip-select can be restored only by a system reset.
10.4 Chip-Select Registers
Table 10-6Table 10-6 is the chip-select register memory map. Reading reserved locations
returns zeros.
Table 10-6. Chip-Select Registers
MBAR
Offset
[31:24] [23:16] [15:8] [7:0]
0x080 Chip-select address register—bank 0 (CSAR0) [p. 10-6] Reserved
1
0x084 Chip-select mask register—bank 0 (CSMR0) [p. 10-6]
0x088 Reserved
1
Chip-select control register—bank 0
(CSCR0) [p. 10-8]
0x08C Chip-select address register—bank 1 (CSAR1) [p. 10-6] Reserved
1
0x090 Chip-select mask register—bank 1 (CSMR1) [p. 10-6]
0x094 Reserved
1
Chip-select control register—bank 1
(CSCR1) [p. 10-8]
0x098 Chip-select address register—bank 2 (CSAR2) [p. 10-6] Reserved
1
0x09C Chip-select mask register—bank 2 (CSMR2) [p. 10-6]
0x0A0 Reserved
1
Chip-select control register—bank 2
(CSCR2) [p. 10-8]
0x0A4 Chip-select address register—bank 3 (CSAR3) [p. 10-6] Reserved
1
0x0A8 Chip-select mask register—bank 3 (CSMR3) [p. 10-6]
0x0AC Reserved
1
Chip-select control register—bank 3
(CSCR3) [p. 10-8]
0x0B0 Chip-select address register—bank 4 (CSAR4) [p. 10-6] Reserved
1
0x0B4 Chip-select mask register—bank 4 (CSMR4) [p. 10-6]
0x0B8 Reserved
1
Chip-select control register—bank 4
(CSCR4) [p. 10-8]
0x0BC Chip-select address register—bank 5 (CSAR5) [p. 10-6] Reserved
1
0x0C0 Chip-select mask register—bank 5 (CSMR5) [p. 10-6]
0x0C4 Reserved Chip-select control register—bank 5
(CSCR5) [p. 10-8]
0x0C8 Chip-select address register—bank 6 (CSAR6) [p. 10-6] Reserved
1
0x0CC Chip-select mask register—bank 6 (CSMR6) [p. 10-6]
0x0D0 Reserved
1
Chip-select control register—bank 6
(CSCR6) [p. 10-8]
0x0D4 Chip-select address register—bank 7 (CSAR7) [p. 10-6] Reserved
1
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eescale S
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