Datasheet

14-2 MCF5307 User’s Manual
Serial Module Overview
14.2 Serial Module Overview
The MCF5307 contains two independent UART modules, whose features are as follows:
• Each can be clocked by BCLKO, eliminating a need for an external crystal
• Full-duplex asynchronous/synchronous receiver/transmitter channel
• Quadruple-buffered receiver
• Double-buffered transmitter
• Independently programmable receiver and transmitter clock sources
• Programmable data format:
— 5–8 data bits plus parity
— Odd, even, no parity, or force parity
— One, one-and-a-half, or two stop bits
• Each channel programmable to normal (full-duplex), automatic echo, local
loop-back, or remote loop-back mode
• Automatic wake-up mode for multidrop applications
• Four maskable interrupt conditions
• UART0 and UART1 have interrupt capability to DMA channels 2 and 3,
respectively, when either the RxRDY or FFULL bit is set in the USR.
• Parity, framing, and overrun error detection
• False-start bit detection
• Line-break detection and generation
• Detection of breaks originating in the middle of a character
• Start/end break interrupt/status
14.3 Register Descriptions
This section contains a detailed description of each register and its specific function.
Flowcharts in Section 14.5.6, “Programming,” describe basic UART module programming.
The operation of the UART module is controlled by writing control bytes into the
appropriate registers. Table 14-1 is a memory map for UART module registers.
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eescale S
emiconduct
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