Datasheet

Glossary-14 MCF5307 User’s Manual
Nop. No-operation. A single-cycle operation that does not affect registers or
generate bus activity.
Overflow. An condition that occurs during arithmetic operations when the
result cannot be stored accurately in the destination register(s). For
example, if two 16-bit numbers are multiplied, the result may not be
representable in 16 bits.
Pipelining. A technique that breaks operations, such as instruction
processing or bus transactions, into smaller distinct stages or tenures
(respectively) so that a subsequent operation can begin before the
previous one completes.
Precise mode. A memory access mode that ensures that all write accesses to
a specied memory region occur in order.
Set (v) To write a nonzero value to a bit or bit eld; the opposite of clear. The
term ‘set’ may also be used to generally describe the updating of a
bit or bit eld.
Set (n). A subdivision of a cache. Cacheable data can be stored in a given
location in any one of the sets, typically corresponding to its lower-
order address bits. Because several memory locations can map to the
same location, cached data is typically placed in the set whose cache
line corresponding to that address was used least recently. See Set-
associativity.
Set-associativity. Aspect of cache organization in which the cache space is
divided into sections, called sets. The cache controller associates a
particular main memory address with the contents of a particular set,
or region, within the cache.
Slave. The device addressed by a master device. The slave is identied in the
address tenure and is responsible for supplying or latching the
requested data for the master during the data tenure.
Static branch prediction. Mechanism by which software (for example,
compilers) can hint to the machine hardware about the direction a
branch is likely to take.
Supervisor mode. The privileged operation state of a processor. In
supervisor mode, software, typically the operating system, can
access all control registers and can access the supervisor memory
space, among other privileged operations.
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