Datasheet

Chapter 1. Overview 1-13
Programming Model, Addressing Modes, and Instruction Set
control. The supervisor programming model provides access to the same registers as
the user model, plus additional registers for configuring on-chip system resources,
as described in Section 1.4.3, “Supervisor Registers.”
Exceptions (including interrupts) are handled in supervisor mode.
1.4.1 Programming Model
Figure 1-4 shows the MCF5307 programming model.
Figure 1-4. ColdFire MCF5307 Programming Model
31 0
D0 Data registers
D1
D2
D3
D4
D5
D6
D7
31 0
A0 Address registers
A1
A2
A3
A4
A5
A6
A7 Stack pointer
PC Program counter
CCR Condition code register
31 0
MACSR MAC status register
ACC MAC accumulator
MASK MAC mask register
15
31 19
(CCR) SR Status register
Must be zeros VBR Vector base register
CACR Cache control register
ACR0 Access control register 0
ACR1 Access control register 1
RAMBAR RAM base address register
MBAR Module base address register
User Registers
Supervisor Registers
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