Datasheet

2-50 MCF5307 User’s Manual
Exception Processing Overview
• Vector number—This 8-bit field, vector[7–0], defines the exception type. It is
calculated by the processor for internal faults and is supplied by the peripheral for
interrupts. See Table 2-18.
2.8.2 Processor Exceptions
Table 2-21 describes MCF5307 exceptions.
Table 2-20. Fault Status Encodings
FS[3–0] Definition
0000 Not an access or address error
0001-001x Reserved
0100 Error on instruction fetch
0101–011x Reserved
1000 Error on operand write
1001 Attempted write to write-protected space
101x Reserved
1100 Error on operand read
1101–111x Reserved
Table 2-21. MCF5307 Exceptions
Exception Description
Access Error Access errors are reported only in conjunction with an attempted store to write-protected memory.
Thus, access errors associated with instruction fetch or operand read accesses are not possible.
Address
Error
Caused by an attempted execution transferring control to an odd instruction address (that is, if bit 0 of
the target address is set), an attempted use of a word-sized index register (Xi.w) or a scale factor of
8 on an indexed effective addressing mode, or attempted execution of an instruction with a full-format
indexed addressing mode.
Illegal
Instruction
On Version 2 ColdFire implementations, only some illegal opcodes were decoded and generated an
illegal instruction exception. The Version 3 processor decodes the full 16-bit opcode and generates
this exception if execution of an unsupported instruction is attempted. Additionally, attempting to
execute an illegal line A or line F opcode generates unique exception types: vectors 10 and 11,
respectively.
ColdFire processors do not provide illegal instruction detection on extension words of any instruction,
including MOVEC. Attempting to execute an instruction with an illegal extension word causes
undefined results.
Divide by
Zero
Attempted division by zero causes an exception (vector 5, offset = 0x014) except when the PC points
to the faulting instruction (DIVU, DIVS, REMU, REMS).
Privilege
Violation
Caused by attempted execution of a supervisor mode instruction while in user mode. The ColdFire
Programmer’s Reference Manual lists supervisor- and user-mode instructions.
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