Datasheet

Chapter 2. ColdFire Core 2-37
ColdFire Instruction Set Architecture Enhancements
Bcc Branch Conditionally Bcc
Operation: If Condition True
Then PC + d
n
→ PC
Assembler Syntax: Bcc <label>
Attributes: Size = byte, word, long
Description: If the condition is true, execution continues at (PC) + displacement. PC holds
the address of the instruction word for the Bcc instruction, plus two. The displacement is a
two’s-complement integer that represents the relative distance in bytes from the current PC
to the destination PC. If the 8-bit displacement field is 0, a 16-bit displacement (the word
after the instruction) is used. If the 8-bit displacement field is 0xFF, the 32-bit displacement
(longword after the instruction) is used. Condition code specifies one of the following tests:
Condition Codes: Not affected
Instruction Fields:
• Condition field—Binary code for one of the conditions listed in the table.
• 8-bit displacement field—Two’s complement integer specifying the number of bytes
between the branch and the next instruction to be executed if the condition is met.
• 16-bit displacement field—Used when the 8-bit displacement contains 0x00.
• 32-bit displacement field—Used when the 8-bit displacement contains 0xFF.
NOTE:
A branch to the next immediate instruction uses 16-bit
displacement because the 8-bit displacement field is 0x00.
Code Condition Code Condition Code Condition Code Condition
CC(HI) Carry clear GT Greater than LT Less than VC Overflow clear
CS(LO) Carry set HI High MI Minus VS Overflow set
EQ Equal LE Less or equal NE Not equal
GE Greater or equal LS Low or same PL Plus
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Instruction
Format:
0110 Condition 8-bit displacement
16-bit displacement if 8-bit displacement = 0x00
32-bit displacement if 8-bit displacement = 0xFF
Bcc V2, V3 Core V4 Core
Opcode present Yes Yes
Operand sizes supported .b, .w .b, .w, .l