Datasheet

3-2 MCF5407 User’s Manual
Overview
Figure 3-1. ColdFire MAC Multiplication and Accumulation
The MAC unit is an extension of the basic multiplier found on most microprocessors. It can
perform operations native to signal processing algorithms in an acceptable number of
cycles, given the application constraints. For example, small digital filters can tolerate some
variance in the execution time of the algorithm; larger, more complicated algorithms such
as orthogonal transforms may have more demanding speed requirements exceeding the
scope of any processor architecture and requiring a fully developed DSP implementation.
The M68000 architecture was not designed for high-speed signal processing, and a large
DSP engine would be excessive in an embedded environment. In striking a middle ground
between speed, size, and functionality, the ColdFire MAC unit is optimized for a small set
of operations that involve multiplication and cumulative additions. Specifically, the
multiplier array is optimized for single-cycle, 16 x 16 multiplies producing a 32-bit result,
with a possible accumulation cycle following. This is common in a large portion of signal
processing applications. In addition, the ColdFire core architecture has been modified to
allow for an operand fetch in parallel with a multiply, increasing overall performance for
certain DSP operations.
3.1.0.1 MAC Programming Model
Figure 3-2 shows the registers in the MAC portion of the user programming model.
Figure 3-2. MAC Programming Model
31 0
MACSR MAC status register
ACC MAC accumulator
MASK MAC mask register
X
+/-
Operand Y Operand X
Shift 0,1,-1
Accumulator