Datasheet

9-4 MCF5407 User’s Manual
Interrupt Controller Registers
NOTE:
Assigning the same interrupt level and priority to multiple
ICRs causes unpredictable system behavior.
Table 9-4 shows possible priority schemes for internal and external sources of the
MCF5407. The internal module interrupt source in this table can be any internal interrupt
source programmed to the given level and priority.
This table shows how external interrupts are prioritized with respect to internal interrupt
sources within the same level. For example, UART0 and UART1 sources are programmed
to IL = 110; in this case, UART0 is given lower priority than UART1, so ICR4[IP] = 01 and
the ICR5[IP] = 10. IRQ3
is programmed to level 6. If all three assert an interrupt request at
the same time, they are serviced in the following order:
1. ICR5[IL] = 110 and ICR5[IP] = 10, so UART1 is serviced first (priority 7 in
Table 9-4).
2. External interrupt IRQ3, set to level 6, is serviced next (priority 8).
3. ICR4[IL] = 110 and ICR5[IP] = 01, so UART0 is serviced last (priority 9).
Table 9-4. Interrupt Priority Scheme
Priority
Interrupt
Level
ICR
Interrupt Source IRQPAR[IRQPAR]
IL IP
1 7 111 11 Internal module xxx
2 111 10 xxx
3 xxx xx External interrupt pin IRQ7 xxx
4 111 01 Internal module xxx
5 111 00 xxx
6 6 110 11 Internal module xxx
7 110 10 xxx
8 xxx xx External interrupt pin IRQ3 (programmed as IRQ6) x1x
9 110 01 Internal module xxx
10 110 00 xxx
11 5 101 11 Internal module xxx
12 101 10 xxx
13 xxx xx External interrupt pin IRQ5 0xx
14 101 01 Internal module xxx
15 101 00 xxx