Datasheet

10-6 MCF5407 User’s Manual
Chip-Select Registers
NOTE:
External masters cannot access MCF5407 on-chip memories or
MBAR, but can access any of the chip-select module registers.
10.4.1 Chip-Select Module Registers
The chip-select module is programmed through the chip select address registers
(CSAR0–CSAR7), chip select mask registers (CSMR0–CSMR7), and the chip select
control registers (CSCR0–CSCR7).
10.4.1.1 Chip-Select Address Registers (CSAR0–CSAR7)
Chip select address registers, Figure 10-2, specify the chip select base addresses.
Table 10-8 describes CSAR[BA].
0x0B8 Reserved
1
Chip-select control register—bank 4
(CSCR4) [p. 10-8]
0x0BC Chip-select address register—bank 5 (CSAR5) [p. 10-6] Reserved
1
0x0C0 Chip-select mask register—bank 5 (CSMR5) [p. 10-7]
0x0C4 Reserved Chip-select control register—bank 5
(CSCR5) [p. 10-8]
0x0C8 Chip-select address register—bank 6 (CSAR6) [p. 10-6] Reserved
1
0x0CC Chip-select mask register—bank 6 (CSMR6) [p. 10-7]
0x0D0 Reserved
1
Chip-select control register—bank 6
(CSCR6) [p. 10-8]
0x0D4 Chip-select address register—bank 7 (CSAR7) [p. 10-6] Reserved
1
0x0D8 Chip-select mask register—bank 7 (CSMR7) [p. 10-7]
0x0DC Reserved
1
Chip-select control register—bank 7
(CSCR7) [p. 10-8]
1
Addresses not assigned to a register and undefined register bits are reserved for expansion. Write accesses to
these reserved address spaces and reserved register bits have no effect.
15 0
Field BA
Reset Uninitialized
R/W R/W
Addr 0x080 (CSAR0); 0x08C (CSAR1); 0x098 (CSAR2); 0x0A4 (CSAR3);
0x0B0 (CSAR4); 0x0BC (CSAR5); 0x0C8 (CSAR6); 0x0D4 (CSAR7)
Figure 10-2. Chip Select Address Registers (CSAR0–CSAR7)
Table 10-7. Chip-Select Registers (Continued)
MBAR
Offset
[31:24] [23:16] [15:8] [7:0]