Datasheet

14-34 MCF5407 User’s Manual
Operation
• For all other modes, the Rx FIFO is effectively 8 x 32.
— 8-bit CODEC or as a UART—Rx FIFO holds thirty-two 8-bit samples. One, two,
or four bytes/samples can be read from the Rx FIFO per internal bus cycle.
— 16-bit CODEC—Rx FIFO holds sixteen 16-bit samples. Either one or two 16-bit
samples can be read from the Rx FIFO per internal bus cycle.
14.5.3 Looping Modes
The UART can be configured to operate in various looping modes as shown in Figure 14-34
on page 14-30. These modes are useful for local and remote system diagnostic functions
and can be used by UART1 in modem mode as well as UART mode. The modes are
described in the following paragraphs and in Section 14.3, “Register Descriptions.”
The UART’s transmitter and receiver should be disabled when switching between modes.
The selected mode is activated immediately upon mode selection, regardless of whether a
character is being received or transmitted.
14.5.3.1 Automatic Echo Mode
In automatic echo mode, shown in Figure 14-35, the UART automatically resends received
data bit by bit. The local CPU-to-receiver communication continues normally, but the
CPU-to-transmitter link is disabled. In this mode, received data is clocked on the receiver
clock and resent on TxD. The receiver must be enabled, but the transmitter need not be.
Figure 14-35. Automatic Echo
Because the transmitter is inactive, USRn[TxEMP,TxRDY] are inactive and data is sent as
it is received. Received parity is checked but is not recalculated for transmission. Character
framing is also checked, but stop bits are sent as they are received. A received break is
echoed as received until the next valid start bit is detected.
14.5.3.2 Local Loop-Back Mode
Figure 14-36 shows how TxD and RxD are internally connected in local loop-back mode.
This mode is for testing the operation of a local UART module channel by sending data to
the transmitter and checking data assembled by the receiver to ensure proper operations.
Figure 14-36. Local Loop-Back
CPU
Disabled Disabled
RxD Input
TxD Input
Tx
Rx
CPU
Disabled
Disabled
RxD Input
TxD Input
Tx
Rx