Datasheet

About This Book xli
Terminology and Notational Conventions
Terminology and Notational Conventions
Table ii shows notational conventions used throughout this document.
POR Power-on reset
PQFP Plastic quad flat pack
RISC Reduced instruction set computing
Rx Receive
SIM System integration module
SOF Start of frame
TAP Test access port
TTL Transistor-to-transistor logic
Tx Transmit
UART Universal asynchronous/synchronous receiver transmitter
Table ii Notational Conventions
Instruction Operand Syntax
Opcode Wildcard
cc Logical condition (example: NE for not equal)
Register Specifications
An Any address register n (example: A3 is address register 3)
Ay,Ax Source and destination address registers, respectively
Dn Any data register n (example: D5 is data register 5)
Dy,Dx Source and destination data registers, respectively
Rc Any control register (example VBR is the vector base register)
Rm MAC registers (ACC, MAC, MASK)
Rn Any address or data register
Rw Destination register w (used for MAC instructions only)
Ry,Rx Any source and destination registers, respectively
Xi index register i (can be an address or data register: Ai, Di)
Table i. Acronyms and Abbreviated Terms (Continued)
Term Meaning