Datasheet

Chapter 17. Signal Descriptions 17-11
MCF5407 Bus Signals
As shown in Table 17-7, if the DMA is bus master (TT = 01), TM[2:0] indicate the type of
DMA access and provide the DMA acknowledgement information for channels 0 and 1. In
addition, TM[1:0] are multiplexed with DMA acknowledge signals for channels 0 and 1.
NOTE:
When TT= 01, the TM2 encoding is independent from TM[1:0]
encoding.
Table 17-9 shows TM[2:0] encodings for emulator mode accesses.
The TM signals indicate user or data transfer types during emulation transfers, while for
interrupt acknowledge transfers, the TM signals carry the interrupt level being
acknowledged; see Table 17-10.
110 Supervisor code access
111 Reserved
Table 17-7. TM2 Encoding for DMA as Master (TT = 01)
TM2 Transfer Modifier Encoding
0 Single-address access negated
1 Single-address access
Table 17-8. TM[1:0] Encoding for DMA as Master (TT = 01)
TM[1:0] Transfer Modifier Encoding
00 DMA acknowledges negated
01 DMA acknowledge, channel 0
10 DMA acknowledge, channel 1
11 Reserved
Table 17-9. TM[2:0] Encodings for TT = 10 (Emulator Access)
TM[2:0] Transfer Modifier
000–100 Reserved
101 Emulator mode data access
110 Emulator mode code access
111 Reserved
Table 17-6. TM[2:0] Encodings for TT = 00 (Normal Access) (Continued)
TM[2:0] Transfer Modifier