Datasheet

About This Book xliii
Terminology and Notational Conventions
/ Arithmetic division
~ Invert; operand is logically complemented
& Logical AND
| Logical OR
^ Logical exclusive OR
<< Shift left (example: D0 << 3 is shift D0 left 3 bits)
>> Shift right (example: D0 >> 3 is shift D0 right 3 bits)
→ Source operand is moved to destination operand
←→ Two operands are exchanged
sign-extended All bits of the upper portion are made equal to the high-order bit of the lower portion
If <condition>
then
<operations>
else
<operations>
Test the condition. If true, the operations after ‘then’ are performed. If the condition is false and the
optional ‘else’ clause is present, the operations after ‘else’ are performed. If the condition is false
and else is omitted, the instruction performs no operation. Refer to the Bcc instruction description
as an example.
Subfields and Qualifiers
{} Optional operation
() Identifies an indirect address
d
n
Displacement value, n-bits wide (example: d
16
is a 16-bit displacement)
Address Calculated effective address (pointer)
Bit Bit selection (example: Bit 3 of D0)
lsb Least significant bit (example: lsb of D0)
LSB Least significant byte
LSW Least significant word
msb Most significant bit
MSB Most significant byte
MSW Most significant word
Condition Code Register Bit Names
C Carry
N Negative
V Overflow
X Extend
Z Zero
Table ii Notational Conventions (Continued)
Instruction Operand Syntax