Datasheet

19-4 MCF5407 User’s Manual
JTAG Register Descriptions
Figure 19-2. JTAG TAP Controller State Machine
19.4 JTAG Register Descriptions
The following sections describe the JTAG registers implemented on the MCF5407.
Test-Logic-Reset
TLR
Run-Test-Idle
RTI
Select-DR-Scan
SeDR
Capture-IR
Update-IR
Exit2-IR
Pause-IR
Exit1-IR
Shift-IR
Capture-DR
Update-DR
Exit2-DR
Pause-DR
Exit1-DR
Shift-DR
0
0
0
1
0
1
1
0
0
0
1
1
0
1
1
11
0
11
11
00
0
1
CaDR
ShDR
E1DR
PaDR
CaIR
ShIR
E1IR
PaIR
<-- Value of TMS at rising edge of TCK
Select-IR-Scan
SeIR
1
0
0 0
1
0
UpIRUpDR
E2DR E2IR