Datasheet

CONTENTS
Paragraph
Number
Title
Page
Number
Contents v
Chapter 1
Overview
1.1 Features............................................................................................................... 1-1
1.2 MCF5407 Features.............................................................................................. 1-4
1.2.1 Process ............................................................................................................ 1-7
1.3 ColdFire Module Description ............................................................................. 1-7
1.3.1 ColdFire Core ................................................................................................. 1-7
1.3.1.1 Instruction Fetch Pipeline (IFP).................................................................. 1-7
1.3.1.2 Operand Execution Pipeline (OEP) ............................................................ 1-8
1.3.1.3 MAC Module.............................................................................................. 1-8
1.3.1.4 Integer Divide Module................................................................................ 1-8
1.3.2 Harvard Architecture ...................................................................................... 1-8
1.3.2.1 16-Kbyte Instruction Cache/8-Kbyte Data Cache ...................................... 1-9
1.3.2.2 Internal 2-Kbyte SRAMs............................................................................ 1-9
1.3.3 DRAM Controller ........................................................................................... 1-9
1.3.4 DMA Controller.............................................................................................. 1-9
1.3.5 UART Modules............................................................................................. 1-10
1.3.6 Timer Module ............................................................................................... 1-11
1.3.7 I
2
C Module ................................................................................................... 1-11
1.3.8 System Interface ........................................................................................... 1-11
1.3.8.1 External Bus Interface .............................................................................. 1-11
1.3.8.2 Chip Selects .............................................................................................. 1-11
1.3.8.3 16-Bit Parallel Port Interface .................................................................... 1-12
1.3.8.4 Interrupt Controller................................................................................... 1-12
1.3.8.5 JTAG......................................................................................................... 1-12
1.3.9 System Debug Interface................................................................................ 1-12
1.3.10 PLL Module.................................................................................................. 1-13
1.4 Programming Model, Addressing Modes, and Instruction Set......................... 1-13
1.4.1 Programming Model ..................................................................................... 1-15
1.4.2 User Registers ............................................................................................... 1-15