Datasheet

Appendix A. Migrating from the ColdFire MCF5307 to the MCF5407 A-1
Appendix A
Migrating from the ColdFire MCF5307 to
the MCF5407
This appendix highlights the differences between the MCF5307B and MCF5407. Users of
the MCF5307 and MCF5307A should use this document in conjunction with the MCF5307
User's Manual Mask Set Addendum. For additional information, see the MCF5407
Integrated ColdFire Microprocessor Product Brief.
A.1 Overview
Customers using the integrated peripherals of the MCF5307 can access the same features
on the MCF5407 with the added advantage of increased cache and RAM memories as well
as an enhanced instruction set architecture (ISA), DMA, synchronous UART, and debug
functionality. Decreased voltage requirements allow designers to take advantage of other
low-voltage components on the board for an integrated, low-power system.
To migrate designs from the MCF5307 to the MCF5407, note the minor differences
between these code-compatible processors in the initialization code, power supplies, and
clock inputs. This document describes the differences between the processors and outlines
the steps to upgrade the design. Table A-1 is a quick reference chart of these differences.
Table A-1. Differences between MCF5307 and MCF5407
Feature MCF5307 MCF5407 Reference
Version core ColdFire Version 3 (V3) ColdFire Version 4 —
MIPS 70 MIPS at 90-MHz core
clock
233 MIPS at 162-MHz core clock —
Instruction set Baseline ColdFire ISA Rev A
is used in Version 2 and
Version 3 core.
ColdFire ISA Rev B which includes certain
instruction enhancements and some instruction
additions; V2/V3 ISA Rev A is
upward-compatible with ISA Rev B.
Section A.2,
“Instruction Set
Additions”