Datasheet
Appendix A. Migrating from the ColdFire MCF5307 to the MCF5407 A-5
UART Enhancements
Although the MCF5407 provides similar encodings on TM[2:0], dedicated DMA
acknowledgement pins (DACK[1:0]) have been added. Thus, DACK[1:0] are now
combined with PP[3:2]/TM[1:0], resulting in a three-to-one multiplexed signal,
PP[3:2]/TM[1:0]/DACK[1:0]. TM2 is still multiplexed only with PP4. For further
clarification on the multiplexing, see the pinout tables in Section A.11, “Pin-Assignment
Compatibility.” When properly connected, TM[2:0] can be used in MCF5407 designs as on
MCF5307 designs or DACK[1:0] can be used for DMA transfers, as shown in Figure A-1.
For further details see Section 12.2, “DMA Signal Description”.
Although TM[2:0] can still drive DMA access encoding, the bit positions of these
encodings are different from the MCF5307. The MCF5407 encodes single-address
accesses on TM2 when the PAR is set to enable the transfer modifier signal and an external
master or DMA transfer is occurring. This encoding is driven by TM0 on the MCF5307.
Again, more details can be found in Section 12.2, “DMA Signal Description”.
Designers who use MCF5307 DMA channels should also note that the MCF5407 DMA
byte count registers (BCRs) for channels 0–3 exclusively support a 24-bit byte count. A
16-bit byte count register is no longer supported; therefore, MPARK[BCR24BIT] has been
removed.
A.5 UART Enhancements
The MCF5407 contains two UARTs that act independently. One of the UARTs on the
MCF5407 has been enhanced to provide synchronous operation and a CODEC interface for
soft modem support. Each UART can be clocked by the system bus clock, eliminating the
need for an external crystal. For more details see, Chapter 14, “UART Modules”.
10 DMA acknowledge, channel 1
11 Reserved
Table A-4. TM0 Encoding for MCF5307 Internal DMA as Master (TT = 01)
TM0 Transfer Modifier Encoding
0 Dual address access
1 Single address access
MCF5307 Function Pin Pin MCF5407 Function
Single/dual cycle access TM0 TM0 DMA 0 acknowledge
DMA 0 acknowledge configuration TM1 TM1 DMA 1 acknowledge
DMA 1 acknowledge configuration TM2 TM2 Single/dual cycle access
Figure A-1. MCF5307 to MCF5407 TM[2:0] Pin Remapping
Table A-3. TM[2:1] Encoding for MCF5307 Internal DMA as Master (TT = 01) (Con-
TM[2:1] Transfer Modifier Encoding