Datasheet

Chapter 2. ColdFire Core 2-7
Programming Model
These registers can be accessed through the dedicated debug serial communication channel,
or from the processor’s supervisor programming model, using the WDEBUG instruction.
The MCF5407’s new interrupt servicing options during emulator mode allow real-time
critical interrupt service routines to be serviced while processing a debug interrupt event,
thereby ensuring that the system continues to operate even during debugging.
To support program trace, the Version 4 debug module combines the processor status and
debug data outputs into a single 8-bit bus, PSTDDATA[7:0]. This bus along with the
PSTCLK output provide execution status, captured operand data, and branch target
addresses defining processor activity at one-half the CPU’s clock rate.
The enhancements of the Revision C debug specification are fully backward-compatible
with the A and B revisions. For more information, see Chapter 5, “Debug Support.”
2.2 Programming Model
The MCF5407 programming model consists of three instruction and register groups—user,
MAC (also user-mode), and supervisor, shown in Figure 2-2. User mode programs are
restricted to user and MAC instructions and programming models. Supervisor-mode
system software can reference all user-mode and MAC instructions and registers and
additional supervisor instructions and control registers. The user or supervisor
programming model is selected based on SR[S]. The following sections describe the
registers in the user, MAC, and supervisor programming models.