Datasheet
CONTENTS
Paragraph
Number
Title
Page
Number
Contents
xv
14.5.2.4.1 Receiver in Modem Mode (UART1).................................................. 14-31
14.5.2.5 FIFO Stack in UART0............................................................................ 14-32
14.5.2.6 FIFOs in UART1 .................................................................................... 14-33
14.5.3 Looping Modes ........................................................................................... 14-34
14.5.3.1 Automatic Echo Mode............................................................................ 14-34
14.5.3.2 Local Loop-Back Mode.......................................................................... 14-34
14.5.3.3 Remote Loop-Back Mode....................................................................... 14-35
14.5.4 Multidrop Mode.......................................................................................... 14-35
14.5.5 Bus Operation ............................................................................................. 14-37
14.5.5.1 Read Cycles ............................................................................................ 14-37
14.5.5.2 Write Cycles ........................................................................................... 14-37
14.5.5.3 Interrupt Acknowledge Cycles ............................................................... 14-37
14.5.6 Programming .............................................................................................. 14-37
14.5.6.1 UART Module Initialization Sequence .................................................. 14-38
Chapter 15
Parallel Port (General-Purpose I/O)
15.1 Parallel Port Operation...................................................................................... 15-1
15.1.1 Pin Assignment Register (PAR) ................................................................... 15-1
15.1.2 Port A Data Direction Register (PADDR).................................................... 15-2
15.1.3 Port A Data Register (PADAT) .................................................................... 15-2
15.1.4 Code Example............................................................................................... 15-4
Part IV
Hardware Interface
Chapter 16
Mechanical Data
16.1 Package ............................................................................................................. 16-1
16.2 Pinout ................................................................................................................ 16-1
16.3 Mechanical Diagram......................................................................................... 16-8
16.4 Case Drawing.................................................................................................... 16-9
Chapter 17
Signal Descriptions
17.1 Overview........................................................................................................... 17-1
17.2 MCF5407 Bus Signals ...................................................................................... 17-7
17.2.1 Address Bus .................................................................................................. 17-7
