Datasheet

Chapter 5. Debug Support 5-27
Background Debug Mode (BDM)
Unassigned command opcodes are reserved by Motorola. All unused command formats
within any revision level perform a
NOP and return the illegal command response.
5.5.3.1 ColdFire BDM Command Format
All ColdFire Family BDM commands include a 16-bit operation word followed by an
optional set of one or more extension words, as shown in Figure 5-18.
Table 5-22 describes BDM elds.
Output the
current PC
SYNC_PC Capture the current PC and display it on the
PSTDDATA output pins.
Parallel 5.5.3.3.9 0x0001
Read control
register
RCREG Read the system control register. Halted 5.5.3.3.10 0x2980
Write control
register
WCREG Write the operand data to the system control
register.
Halted 5.5.3.3.11 0x2880
Read debug
module
register
RDMREG Read the debug module register. Parallel 5.5.3.3.12 0x2D {0x4
2
DRc[4:0]}
Write debug
module
register
WDMREG Write the operand data to the debug module
register.
Parallel 5.5.3.3.13 0x2C {0x4
2
Drc[4:0]}
1
General command effect and/or requirements on CPU operation:
- Halted. The CPU must be halted to perform this command.
- Steal. Command generates bus cycles that can be interleaved with bus accesses.
- Parallel. Command is executed in parallel with CPU activity.
2
0x4 is a three-bit field.
15 1098765432 0
Operation 0 R/W Op Size 0 0 A/D Register
Extension Word(s)
Figure 5-18. BDM Command Format
Table 5-22. BDM Field Descriptions
Bit Name Description
15–10 Operation Specifies the command. These values are listed in Table 5-21.
9 0 Reserved
8 R/W Direction of operand transfer.
0 Data is written to the CPU or to memory from the development system.
1 The transfer is from the CPU to the development system.
Table 5-21. BDM Command Summary (Continued)
Command Mnemonic Description
CPU
State
1
Section
Command
(Hex)