Datasheet

Chapter 5. Debug Support 5-43
Background Debug Mode (BDM)
5.5.3.3.11 Write Control Register (WCREG)
The operand (longword) data is written to the specified control register. The write alters all
32 register bits.
Command/Result Formats:
Command Sequence:
Figure 5-41. WCREG Command Sequence
Operand Data: This instruction requires two longword operands. The first selects the
register to which the operand data is to be written; the second
contains the data.
Result Data: Successful write operations return 0xFFFF. Bus errors on the write
cycle are indicated by the setting of bit 16 in the status message and
by a data pattern of 0x0001.
15 12 11 8 7 4 3 0
Command 0x2 0x8 0x8 0x0
0x0 0x0 0x0 0x0
0x0 Rc
Result D[31:16]
D[15:0]
Figure 5-40. WCREG Command/Result Formats
EXT WORD
"NOT READY"
EXT WORD
"NOT READY"
WCREG
???
NEXT CMD
"NOT READY"
XXX
"NOT READY"
XXX
XXX
BERR
"CMD COMPLETE"
NEXT CMD
WRITE
MEMORY
LOCATION
MS DATA
"NOT READY"
LS DATA
"NOT READY"
CONTROL
REGISTER
WRITE
MS ADDR
MS ADDR