Datasheet

7-6 MCF5407 User’s Manual
PLL Power Supply Filter Circuit
Figure 7-4. Reset and Initialization Timing
7.5 PLL Power Supply Filter Circuit
To ensure PLL stability, the power supply to the PLL power pin should be filtered using a
circuit similar to the one in Figure 7-5. The circuit should be placed as close as possible to
the PLL power pin to ensure maximum noise filtering.
Figure 7-5. PLL Power Supply Filter Circuit
50K CLKIN
RSTO
D[7:0] latched on rising edge of CLKIN
>16 CLKS
CLKIN
RSTI
BCLKO
PSTCLK
D[7:0]
>10 CLKS
Cycle Lock Time
10 Ω
10 µF 0.1 µF
PLL power pinVdd