Datasheet

Chapter 14. UART Modules 14-7
Register Descriptions
14.3.2 UART Mode Register 2 (UMR2n)
UART mode registers 2 (UMR2n) control UART module configuration. UMR2n can be
read or written when the mode register pointer points to it, which occurs after any access to
UMR1n. UMR2n accesses do not update the pointer.
Table 14-3 describes UMR2n fields.
76543 0
Field CM TxRTS TxCTS SB
Reset 0000_0000
R/W R/W
Address MBAR + 0x1C0, 0x200. After UMR1n is read or written, the pointer points to UMR2n.
Figure 14-3. UART Mode Register 2 (UMR2n)
Table 14-3. UMR2n Field Descriptions
Bits Name Description
7–6 CM Channel mode. Selects a channel mode. Section 14.5.3, “Looping Modes,” describes individual
modes. CM is used in both UART and modem modes.
00 Normal
01 Automatic echo
10 Local loop-back
11 Remote loop-back
5 TxRTS Transmitter ready-to-send. Controls negation of R
TS to automatically terminate a message
transmission. Attempting to program a receiver and transmitter in the same channel for R
TS control is
not permitted and disables R
TS control for both. TxRTS is not used in modem mode.
0 The transmitter has no effect on R
TS.
1 In applications where the transmitter is disabled after transmission completes, setting this bit
automatically clears UOP[RTS] one bit time after any characters in the channel transmitter shift and
holding registers are completely sent, including the programmed number of stop bits.
4 TxCTS Transmitter clear-to-send. If both TxCTS and TxRTS are enabled, TxCTS controls the operation of the
transmitter. TxCTS is not used in modem mode.
0 CTS
has no effect on the transmitter.
1 Enables clear-to-send operation. The transmitter checks the state of CTS
each time it is ready to
send a character. If CTS
is asserted, the character is sent; if it is negated, the channel TxD remains
in the high state and transmission is delayed until CTS
is asserted. Changes in CTS as a character is
being sent do not affect its transmission.