Datasheet

14-12 MCF5407 User’s Manual
Register Descriptions
14.3.7 UART Clock-Select Registers (UCSRn)
The UART clock-select registers (UCSRn) select an external clock on the TIN input
(divided by 1 or 16) or a prescaled CLKIN as the clocking source for the transmitter and
receiver. See Section 14.5.1, “Transmitter/Receiver Clock Source.” UCSR1 is used in
UART mode only. The transmitter and receiver can use different clock sources. To use
CLKIN for both, set UCSRn to 0xDD.
Table 14-8 describes UCSRn fields.
14.3.8 Receive Samples Available Register (RSMP)
The receive samples available register (RSMP), Figure 14-9, shows the current byte count
for the Rx FIFO. It is in UART1 only and can be used in both UART and modem modes.
1 FFULL FIFO full.
UART0:
0 The FIFO is not full but may hold up to two unread characters.
1 A character was received and is waiting in the receiver buffer FIFO.
UART1 (in UART or modem modes):
1 Rx FIFO is full, as defined by the RXLVL. FFULL is set as soon as the number of bytes in the Rx
FIFO exceeds the RXLVL value, due to the transfer of a sample (1 or 2 bytes) from the Rx shift
register to the Rx FIFO.
0 RxRDY Receiver ready (in UART or modem modes).
0 The CPU has read the receiver buffer and no characters remain in the FIFO after this read.
1 One or more characters were received and are waiting in the receiver buffer FIFO.
7430
Field RCS TCS
Reset 0000_0000
R/W Write only
Address MBAR + 0x1C4 (UCSR0), 0x204 (UCSR1)
Figure 14-8. UART Clock-Select Register (UCSRn)
Table 14-8. UCSRn Field Descriptions
Bits Name Description
7–4 RCS Receiver clock select. Selects the clock source for the receiver channel.
1101 Prescaled CLKIN
1110 TIN divided by 16
1111 TIN
3–0 TCS Transmitter clock select. Selects the clock source for the transmitter channel.
1101 Prescaled CLKIN
1110 TIN divided by 16
1111 TIN
Table 14-7. USRn Field Descriptions (Continued)
Bits Name Description