Datasheet

14-24 MCF5407 User’s Manual
Operation
14.5.1.1 Programmable Divider
As Figure 14-28 shows, the UART transmitter and receiver can use the following clock
sources:
• An external clock signal on the TIN pin that can be divided by 16. When not divided,
TIN provides a synchronous clock mode; when divided by 16, it is asynchronous.
• CLKIN supplies an asynchronous clock source that is divided by 32 and then
divided by the 16-bit value programmed in UDUn and UDLn. See Section 14.3.16,
“UART Divider Upper/Lower Registers (UDUn/UDLn).”
The choice of TIN or CLKIN is programmed in the UCSR.
Figure 14-28. Clocking Source Diagram
NOTE:
If TIN is a clocking source for either the timer or UART, as is
the case for UART1 used as an 8- or 16-bit CODEC interface,
the timer module cannot use TIN for timer capture.
14.5.1.2 Calculating Baud Rates
The following sections describe how to calculate baud rates.
14.5.1.2.1 CLKIN Baud Rates
When CLKIN is the UART clocking source, it goes through a divide-by-32 prescaler and
then passes through the 16-bit divider of the concatenated UDUn and UDLn registers.
Using a 54-MHz CLKIN, the baud-rate calculation is as follows:
UART
On-Chip
TIN
x1
Prescaler
x16
Prescaler
Clock
Generator
16-Bit
Divider
x32
Prescaler
TIN
Clocking sources programmed in UCSR
Timer Module
TOUT
TIN
TxD
RxD
Tx
Rx
Rx Buffer
Tx Buffer
CLKIN