Datasheet

16-6 MCF5407 User’s Manual
Pinout
139 D6 CS_CONF1 I/O Data bus/Chip select configuration 8
140 D5 CS_CONF0 I/O Data bus/Chip select configuration 8
141 GND ——Ground pin —
142 D4 ADDR_CONF I/O Data bus/Address configuration 8
143 D3 BE_CONFIG0 I/O Data bus/Byte enable configuration 8
144 D2 DIVIDE2 I/O Data bus/Divide control PCLK:CLKIN 8
145 EVCC ——3.3-V power input —
146 D1 DIVIDE1 I/O Data bus/Divide control PCLK:CLKIN 8
147 D0 DIVIDE0 I/O Data bus/Divide control PCLK:CLKIN 8
148 GND ——Ground pin —
149 DSCLK TRST
I Debug serial clock/JTAG Reset —
150 TCK TCK I JTAG clock —
151 DSO TDO O Debug serial out/JTAG data out 8
152 IVCC ——1.8-V power input —
153 DSI TDI I Debug serial input/JTAG data in —
154 BKPT
TMS I Debug breakpoint/JTAG mode select —
155 HIZ
— I High impedance override —
156 GND ——Ground pin —
Table 16-4. Pins 157–208 (Top, Right-to-Left)
Pin
Alternate
Function
I/O Description
Drive
(mA)
No Name
157 IVCC ——1.8-V power input —
158 CTS1
— I UART1 clear-to-send —
159 R
TS1 — O UART1 request-to-send 8
160 RXD1 — I UART1 receive data —
161 TXD1 — O UART1 transmit data 8
162 GND ——Ground pin —
163 CTS0
— I UART0 clear-to-send —
164 R
TS0 — O UART0 request-to-send 8
165 RXD0 — I UART0 receive data —
166 TXD0 — O UART0 transmit data 8
167 EVCC ——3.3-V power input —
Table 16-3. Pins 105–156 (Right, Bottom-to-Top) (Continued)
Pin
Alternate
Function
I/O Description
Drive
(mA)
No Name