Datasheet

Chapter 16. Mechanical Data 16-7
Pinout
168 EDGESEL — I SDRAM bus clock edge select —
169 GND ——Ground pin —
170 BCLKO — O Bus clock output 16
171 IVCC ——1.8-V power input —
172 RST
O — O Processor reset output 8
173 GND ——Ground pin —
174 CLKIN — I Clock input —
175 IVCC ——1.8-V power input —
176 MTMOD0 — I JTAG/BDM select (Tie high or low) —
177 MTMOD1 — I Tie high or low —
178 PGND ——PLL ground pin —
179 NC — O —
180 PVCC ——1.8-V filter supply for PLL —
181 MTMOD2 — I Tie high or low —
182 MTMOD3 — I Tie high or low —
183 GND ——Ground pin —
184 PSTCLK — O Processor status clock 8
185 IVCC ——1.8-V power input —
186 PSTDDATA0 — O Processor status/debug data 8
187 PSTDDATA1 — O Processor status/debug data 8
188 GND ——Ground pin —
189 PSTDDATA2 — O Processor status/debug data 8
190 PSTDDATA3 — O Processor status/debug data 8
191 EVCC ——3.3-V power input —
192 PSTDDATA4 — O Processor status/debug data 8
193 PSTDDATA5 — O Processor status/debug data 8
194 GND ——Ground pin —
195 PSTDDATA6 — O Processor status/debug data 8
196 PSTDDATA7 — O Processor status/debug data 8
197 IVCC ——1.8-V power input —
198 PP7 TIP
I/O Parallel port bit/transfer in progress 8
199 PP6 DREQ0
I/O Parallel port bit/DMA request 8
200 PP5 DREQ1
I/O Parallel port bit/DMA request 8
201 GND ——Ground pin —
202 PP4 TM2 I/O Parallel port bit/Transfer modifier 8
Table 16-4. Pins 157–208 (Top, Right-to-Left) (Continued)
Pin
Alternate
Function
I/O Description
Drive
(mA)
No Name