Datasheet

17-2 MCF5407 User’s Manual
Overview
Figure 17-1. MCF5407 Block Diagram with Signal Interfaces
Table 17-1 lists the MCF5407 signals grouped by functionality.
TDO/DSO
TDI/DSI
TMS/BKPT
TCK
Parallel
Interface
Chip
UART0
Serial
I/O
CLKIN
TIN[1:0]
TOUT[1:0]
TA
R/W
SIZ[1:0]
D[31:0]
A[23:0]
IRQ7
IRQ5
IRQ3
JTAG
Port
Selects
ColdFire V4 Core
2 2-Kbyte SRAMs
MAC
Bus
TxD0
RxD0
R
TS0
CTS0
TxD1
RxD1
R
TS1
CTS1
RAS[1:0]
CAS
[3:0]
DRAMW
2
4
24
32
BE[
3:0]/BWE[3:0]
CS
[7:0]
8
4
2
AS
BR
BG
BD
TRST/DSCLK
HIZ
RSTI
Port
1
2
2
2
Test
Controller
IRQ1
OE
DMA
PSTCLK
BCLKO
2
DREQ[1:0]/
SRAS
SCAS
SCKE
A[31:24]/PP[15:8]
8
TS
TM[2:0]/PP[4:2]
2
8
MTMOD[3:0]
4
EDGESEL
TT[1:0]]/PP[1:0]
RSTO
TIP/PP7
I
2
C
Module
2
SCL
SDA
1
Parallel port pins (PPn) are multiplexed with other bus functions as shown.
16-Kbyte
2
I
2
C is a Philips proprietary interface.
Internal Bus Arbiter
External
to Internal
Bus
UART1
Serial
I/O
Dual
Timer
Module
Interrupt
Controller
DRAM
Controller
System
Module
8-Kbyte
2
DACK[1:0]/ PP[3:2] PP[6:5]
Integration
Module
(synch)
PSTDDATA[7:0]
D-Cache
Debug Module
I-Cache
DIV
(SIM)
PLL