Datasheet

20-24 MCF5407 User’s Manual
IEEE 1149.1 (JTAG) AC Timing Specifications
20.11 IEEE 1149.1 (JTAG) AC Timing Specifi cations
Table 20-16 lists specifications for JTAG AC timing parameters shown in Figure 20-24.
Figure 20-24 shows JTAG timing.
Table 20-16. IEEE 1149.1 (JTAG) AC Timing Specifications
Num Characteristic
All
Frequencies
Units
Min Max
— TCK frequency of operation 0 10 MHz
J1 TCK cycle time 100 — nS
J2a TCK clock pulse high width (measured at 1.5 V) 40 — nS
J2b TCK clock pulse low width (measured at 1.5 V) 40 — nS
J3a TCK fall time (V
IH
= 2.4 V to V
IL
= 0.5V) — 5nS
J3b TCK rise time (V
IL
= 0.5v to V
IH
= 2.4V) — 5nS
J4 TDI, TMS to TCK rising (input setup) 10 — nS
J5 TCK rising to TDI, TMS invalid (hold) 15 — nS
J6 Boundary scan data valid to TCK (setup) 10 — nS
J7 TCK to boundary-scan data invalid (hold) 15 — nS
J8 TRST
pulse width (asynchronous to clock edges) 15 ——
J9 TCK falling to TDO valid (signal from driven or
three-state)
— 30 nS
J10 TCK falling to TDO high impedance — 30 nS
J11 TCK falling to boundary scan data valid (signal from
driven or three-state)
— 30 nS
J12 TCK falling to boundary scan data high impedance — 30 nS