Datasheet

Chapter 1. Overview 1-15
Programming Model, Addressing Modes, and Instruction Set
1.4.1 Programming Model
Figure 1-4 shows the MCF5407 programming model.
Figure 1-4. ColdFire MCF5407 Programming Model
1.4.2 User Registers
The user programming model is shown in Figure 1-4 and summarized in Table 1-1.
31 0
D0 Data registers
D1
D2
D3
D4
D5
D6
D7
31 0
A0 Address registers
A1
A2
A3
A4
A5
A6
A7 Stack pointer
PC Program counter
CCR Condition code register
31 0
MACSR MAC status register
ACC MAC accumulator
MASK MAC mask register
15
31 19
(CCR) SR Status register
Must be zeros VBR Vector base register
CACR Cache control register
ACR0 Access control register 0 (data)
ACR1 Access control register 1 (data)
ACR2 Access control register 2 (instruction)
ACR3 Access control register 3 (instruction)
RAMBAR0 RAM 0 base address register
RAMBAR1 RAM 1 base address register
MBAR Module base address register
Table 1-1. User-Level Registers
Register Description
Data registers
(D0–D7)
These 32-bit registers are for bit, byte, word, and longword operands. They can also be used as
index registers.
Address registers
(A0–A7)
These 32-bit registers serve as software stack pointers, index registers, or base address
registers. The base address registers can be used for word and longword operations. A7
functions as a hardware stack pointer during stacking for subroutine calls and exception handling.
User RegistersSupervisor Registers