Datasheet

2-22 MCF5407 User’s Manual
Instruction Set Summary
Table 2-9 describes supervisor-level instructions.
NOP none Unsized Synchronize pipelines; PC + 2 → PC
NOT Dx .L ~ Destination → destination
OR <ea>y,Dx
Dy,<ea>x
.L Source | destination → destination
ORI #<data>,Dx .L Immediate data | destination → destination
PEA <ea-3>y .L SP – 4 → SP; Address of <ea> → (SP)
PULSE none Unsized Set PST= 0x4
REMS <ea-1>,Dx .L Dx/<ea>y → Dw {32-bit remainder}
Signed operation
REMU <ea-1>,Dx .L Dx/<ea>y → Dw {32-bit remainder}
Unsigned operation
RTS none Unsized (SP) → PC; SP + 4 → SP
SATS Dx .L If CCR.V=1,
then if Dx[31] =0
then 0x80000000 → Dx
else 0x7FFFFFFF→ Dx
else Dx is unchanged
Scc Dx .B If condition true, then 1s  destination;
Else 0s → destination
SUB <ea>y,Dx
Dy,<ea>x
.L
.L
Destination – source → destination
SUBA <ea>y,Ax .L Destination – source → destination
SUBI #<data>,Dx .L Destination – immediate data → destination
SUBQ #<data>,<ea>x .L Destination – immediate data → destination
SUBX Dy,Dx .L Destination – source – X → destination
SWAP Dx .W MSW of Dx ←→ LSW of Dx
TAS <ea>x .B Set CCR; 1→ Bit 7 of <ea>x
TRAP #<vector> Unsized SP – 4 → SP;PC → (SP);
SP – 2 → SP;SR → (SP);
SP – 2 → SP; format → (SP);
Vector address → PC
TRAPF None
#<data>
Unsized
.W
.L
PC + 2 → PC
PC + 4 → PC
PC + 6 → PC
TST <ea>y .B,.W,.L Set condition codes
UNLK Ax Unsized Ax →SP; (SP) → Ax; SP + 4 → SP
WDDATA <ea>y .B,.W,.L <ea>y →DDATA port
1
By default the HALT instruction is a supervisor-level instruction; however, it can be configured to allow user-mode
execution by setting CSR[UHE].
Table 2-8. User-Level Instruction Set Summary (Continued)
Instruction Operand Syntax Operand Size Operation