Datasheet
Table Of Contents
- MCF5441x ColdFire Microprocessor Data Sheet
- 1 MCF5441x family comparison
- 2 Hardware design considerations
- 3 Pin assignments and reset states
- 4 Electrical characteristics
- 4.1 Absolute maximum ratings
- 4.2 Thermal characteristics
- 4.3 ESD protection
- 4.4 Static latch-up (LU)
- 4.5 DC electrical specifications
- 4.6 Output pad loading and slew rate
- 4.7 DDR pad drive strengths
- 4.8 Oscillator and PLL electrical characteristics
- 4.9 Reset timing specifications
- 4.10 FlexBus timing specifications
- 4.11 NAND flash controller (NFC) timing specifications
- 4.12 DDR SDRAM controller timing specifications
- 4.13 USB transceiver timing specifications
- 4.14 ULPI timing specifications
- 4.15 eSDHC timing specifications
- 4.16 SIM timing specifications
- 4.17 SSI timing specifications
- 4.18 12-bit ADC specifications
- 4.19 12-bit DAC timing specifications
- 4.20 mcPWM timing specifications
- 4.21 I2C timing specifications
- 4.22 Ethernet assembly timing specifications
- 4.23 32-bit timer module timing specifications
- 4.24 DSPI timing specifications
- 4.25 SBF timing specifications
- 4.26 1-Wire timing specifications
- 4.27 General purpose I/O timing specifications
- 4.28 Rapid general purpose I/O timing specifications
- 4.29 JTAG and boundary scan timing specifications
- 4.30 Debug AC timing specifications
- 5 Package information
- 6 Product documentation
- 7 Revision history
Pin assignments and reset states
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor 13
External interrupts port
IRQ7 PC6 — — — I EVDD ssr G10 F12
IRQ6 PC5 — USB_CLKIN
11
—IEVDD ssr — N1
IRQ4 PC4 DREQ0 ——IEVDDssr E11 F14
IRQ3 PC3 DSPI0_PCS3 USBH_VBUS_EN — IEVDDssr — M1
IRQ2 PC2 DSPI0_PCS2 USBH_VBUS_OC —
12
IEVDDssr — M2
IRQ1 PC1 — — — IEVDDssr E13 F13
USB On-the-Go
USBO_DM — — — —
I/O VDD_
USB0
ae B13 A14
USBO_DP — — — — I/O VDD_
USB0
ae A13 B14
USB host
USBH_DM — — — —
I/O VDD_
USBH
ae — A15
USBH_DP — — — — I/O VDD_
USBH
ae — B15
ADC
ADC_IN7/
DAC1_OUT
— — — — I VDDA_
DAC_
ADC
ae — K3
ADC_IN[6:4] — — — — I VDDA_
ADC
ae — H2, J3, G4
ADC_IN3/
DAC0_OUT
— — — — I VDDA_
DAC_
ADC
ae — K4
ADC_IN[2:0] — — — — I VDDA_
ADC
ae — J2, J1, H1
Real time clock
RTC_EXTAL
— — — — I
4
VSTBY ae B14 B16
RTC_XTAL — — — — O VSTBY ae C14 C16
DSPI0/SBF
13
DSPI0_PCS1/
SBF_CS
PC0 — — — I/O EVDD msr K3 L1
Table 5. MCF5441x Signal information and muxing (continued)
Signal name GPIO Alternate 1 Alternate 2
Pullup (U)
1
Pulldown (D)
Direction
2
Voltage d omain
Pad type
3
196 MAPBGA
256 MAPBGA