Datasheet

Pin assignments and reset states
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor 15
Enhanced secure digital host controller
SDHC_DAT3 PF2 PWM_A1 DSPI1_PCS0 — I/O EVDD msr — B13
SDHC_DAT2 PF1 PWM_B1 DSPI1_PCS2 — I/O EVDD msr — E14
SDHC_DAT1 PF0 PWM_A2 DSPI1_PCS1 — I/O EVDD msr — D12
SDHC_DAT0 PG7 PWM_B2 DSPI1_SOUT — I/O EVDD msr — B12
SDHC_CMD PG6 PWM_B0 DSPI1_SIN — I/O EVDD msr — C11
SDHC_CLK PG5 PWM_A0 DSPI1_SCK — O EVDD msr — A10
Smart card interface 0
SIM0_DATA RGPIO13/PG4 PWM_FAULT2 SDHC_DAT7 — I/O
EVDD msr — E12
SIM0_VEN RGPIO12/PG3 PWM_FAULT0 — — O EVDD msr — D13
SIM0_RST RGPIO11/PG2 PWM_FORCE SDHC_DAT6 — O EVDD msr — C15
SIM0_PD RGPIO10/PG1 PWM_SYNC SDHC_DAT5 — I EVDD msr — C14
SIM0_CLK RGPIO9/PG0 PWM_FAULT1 SDHC_DAT4 — O EVDD msr — A11
Synchronous serial interface 0
19
SSI0_RXD PH7 I2C2_SDA SIM1_VEN — I EVDD msr B12 C12
SSI0_TXD PH6 I2C2_SCL SIM1_DATA — O EVDD msr A11 C13
SSI0_FS PH5 UART7_TXD SIM1_RST — I/O EVDD msr C13 E15
SSI0_MCLK PH4 SSI_CLKIN SIM1_CLK — O EVDD msr A12 A12
SSI0_BCLK PH3 UART7_RXD SIM1_PD — I/O EVDD msr D13 A13
Ethernet subsystem
MII0_MDC PI1 RMII0_MDC
20
——OEVDD fsr N14 P16
MII0_MDIO PI0 RMII0_MDIO
20
——I/OEVDD fsr M14 N16
MII0_RXDV PJ7 RMII0_CRS_DV
20
——IEVDD fsr M13 P14
MII0_RXD[1:0] PJ[6:5] RMII0_RXD[1:0]
20
——IEVDD fsr P13, N13 R15, T15
MII0_RXER PJ4 RMII0_RXER
20
——IEVDD fsr M12 N14
MII0_TXD[1:0] PJ[3:2] RMII0_TXD[1:0]
20
——OEVDD fsr L12, L11 R13, P13
MII0_TXEN PJ1 RMII0_TXEN
20
—D
21
O EVDD fsr N12 P12
MII0_COL PJ0 RMII1_MDC ULPI_STP — I EVDD fsr — R12
MII0_TXER PK7 RMII1_MDIO ULPI_DATA4 — O EVDD fsr — R14
MII0_CRS PK6 RMII1_CRS_DV ULPI_DATA5 — I EVDD fsr — P11
MII0_RXD[3:2] PK[5:4] RMII1_RXD[1:0] ULPI_DATA[1:0] — I EVDD fsr — P15, N13
Table 5. MCF5441x Signal information and muxing (continued)
Signal name GPIO Alternate 1 Alternate 2
Pullup (U)
1
Pulldown (D)
Direction
2
Voltage d omain
Pad type
3
196 MAPBGA 256 MAPBGA