Datasheet
Table Of Contents
- MCF5441x ColdFire Microprocessor Data Sheet
- 1 MCF5441x family comparison
- 2 Hardware design considerations
- 3 Pin assignments and reset states
- 4 Electrical characteristics
- 4.1 Absolute maximum ratings
- 4.2 Thermal characteristics
- 4.3 ESD protection
- 4.4 Static latch-up (LU)
- 4.5 DC electrical specifications
- 4.6 Output pad loading and slew rate
- 4.7 DDR pad drive strengths
- 4.8 Oscillator and PLL electrical characteristics
- 4.9 Reset timing specifications
- 4.10 FlexBus timing specifications
- 4.11 NAND flash controller (NFC) timing specifications
- 4.12 DDR SDRAM controller timing specifications
- 4.13 USB transceiver timing specifications
- 4.14 ULPI timing specifications
- 4.15 eSDHC timing specifications
- 4.16 SIM timing specifications
- 4.17 SSI timing specifications
- 4.18 12-bit ADC specifications
- 4.19 12-bit DAC timing specifications
- 4.20 mcPWM timing specifications
- 4.21 I2C timing specifications
- 4.22 Ethernet assembly timing specifications
- 4.23 32-bit timer module timing specifications
- 4.24 DSPI timing specifications
- 4.25 SBF timing specifications
- 4.26 1-Wire timing specifications
- 4.27 General purpose I/O timing specifications
- 4.28 Rapid general purpose I/O timing specifications
- 4.29 JTAG and boundary scan timing specifications
- 4.30 Debug AC timing specifications
- 5 Package information
- 6 Product documentation
- 7 Revision history
Pin assignments and reset states
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor 19
3.2 Pinout—196 MAPBGA
The pinout for the MCF54410 package is shown below.
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A
GND
FB_
AD10
FB_
AD14
FB_
AD16
FB_
AD18
FB_
AD19
FB_
AD24
FB_
AD27
FB_
AD30
FB_
AD31
SSI0_
TXD
SSI0_
MCLK
USB_
DPLS
GND A
B
FB_
AD6
FB_
AD9
FB_
AD11
FB_
AD13
FB_
AD17
FB_
AD20
FB_
AD23
FB_
AD26
FB_
AD29
U1_
RXD
U0_
TXD
SSI0_
RXD
USB_
DMNS
RTC_
EXTAL
B
C
FB_
AD3
FB_
AD5
FB_
AD8
FB_
AD12
FB_
AD15
FB_
AD21
FB_
AD22
FB_
AD25
FB_
AD28
U1_
TXD
U0_
RXD
U0RTS_
B
SSI0_
FS
RTC_
XTAL
C
D
FB_
AD0
FB_
AD2
FB_
AD4
FB_
AD7
FBVDD FBVDD FBVDD GND CVDD CVDD
U1RTS_
B
U1CTS_
B
SSI0_
BCLK
GND D
E
FB_BE2
_B
FB_ALE
FB_
AD1
FBVDD FBVDD FBVDD FBVDD GND CVDD CVDD IRQ4_B
U0CTS_
B
IRQ1_B VSTBY E
F
FB_BE0
_B
FB_BE1
_B
FB_BE3
_B
EVDD EVDD EVDD EVDD GND CVDD CVDD
VDD_
USBO
CVDD
VSS_OS
C_A_PL
L
VDD_OS
C_A_PL
L
F
G
FB_CLK
FB_CS0
_B
FB_CS1
_B
GND
BOOT
MOD1
EVDD EVDD GND GND IRQ7_B GND
I2C0_
SDA
T3IN EXTAL G
H
FB_OE_
B
FB_RW_
B
FB_TA_
B
GND
BOOT
MOD0
EVDD EVDD GND GND GND GND
I2C0_
SCL
T1IN XTAL H
J
DSPI0_
PCS0
DSPI0_
SOUT
DSPI0_
SCK
SD_BA1 EVDD EVDD GND GND GND GND GND T2IN T0IN GND J
K
SD_A1
DSPI0_
SIN
DSPI0_
PCS1
SD_CAS
_B
GND GND SDVDD SDVDD SDVDD TEST GND ALLPST TMS
RSTIN_
B
K
L
SD_A9 SD_A10 SD_A5 SD_A4 SDVDD SDVDD SDVDD SD_VTT TRST_B TDI
RM110_
TXD0
RM110_
TXD1
TDO TCLK L
M
SD_A12
SD_A7
SD_A11
SD_RAS
_B
SD_CS_
B
SD_BA2 SD_D0 SD_D2 SD_D4 SD_D6 OWIO
RMII0_
RXER
RMII0_
CRS_DV
RMII0_
MDIO
M
N
SD_A3 SD_A2 SD_A0 SD_A8
SD_WE_
B
SD_CKE
SD_DQM
SD_D1
SD_VRE
F
SD_D5
JTAG_E
N
RMII0_
TXEN
RMII0_
RXD0
RMII0_
MDC
N
P
GND SD_A6 SD_A13 SD_BA0 SD_ODT SD_CLK
SD_CLK_
B
SD_DQS
SD_DQS
_B
SD_D3 SD_D7
RSTOUT
_B
RMII0_
RXD1
GND P
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Figure 7. MCF54410 Pinout (196 MAPBGA)
