Datasheet
Table Of Contents
- MCF5441x ColdFire Microprocessor Data Sheet
- 1 MCF5441x family comparison
- 2 Hardware design considerations
- 3 Pin assignments and reset states
- 4 Electrical characteristics
- 4.1 Absolute maximum ratings
- 4.2 Thermal characteristics
- 4.3 ESD protection
- 4.4 Static latch-up (LU)
- 4.5 DC electrical specifications
- 4.6 Output pad loading and slew rate
- 4.7 DDR pad drive strengths
- 4.8 Oscillator and PLL electrical characteristics
- 4.9 Reset timing specifications
- 4.10 FlexBus timing specifications
- 4.11 NAND flash controller (NFC) timing specifications
- 4.12 DDR SDRAM controller timing specifications
- 4.13 USB transceiver timing specifications
- 4.14 ULPI timing specifications
- 4.15 eSDHC timing specifications
- 4.16 SIM timing specifications
- 4.17 SSI timing specifications
- 4.18 12-bit ADC specifications
- 4.19 12-bit DAC timing specifications
- 4.20 mcPWM timing specifications
- 4.21 I2C timing specifications
- 4.22 Ethernet assembly timing specifications
- 4.23 32-bit timer module timing specifications
- 4.24 DSPI timing specifications
- 4.25 SBF timing specifications
- 4.26 1-Wire timing specifications
- 4.27 General purpose I/O timing specifications
- 4.28 Rapid general purpose I/O timing specifications
- 4.29 JTAG and boundary scan timing specifications
- 4.30 Debug AC timing specifications
- 5 Package information
- 6 Product documentation
- 7 Revision history
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Electrical characteristics
Freescale Semiconductor22
4.2 Thermal characteristics
The average chip-junction temperature (T
J
) in C can be obtained from:
Eqn. 1
Where:
T
A
= Ambient Temperature, C
Q
JMA
= Package Thermal Resistance, Junction-to-Ambient, C/W
P
D
=P
INT
+ P
I/O
P
INT
=I
DD
IV
DD
, Watts - Chip Internal Power
P
I/O
= Power Dissipation on Input and Output Pins — User Determined
For most applications P
I/O
< P
INT
and can be ignored. An approximate relationship between P
D
and T
J
(if P
I/O
is neglected) is:
Eqn. 2
Table 7. Thermal characteristics
Characteristic Symbol
196
MAPBGA
256
MAPBGA
Unit
Junction to ambient, natural convection
1
1
JA
and
jt
parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection.
Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting
site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board,
and board thermal resistance.
Single layer
board (1s)
2
2
Per JEDEC JESD51-2 with the single layer board horizontal. Board meets JESD51-9 specification.
JA
58 —
Four layer board
(2s2p)
2,3
3
Per JEDEC JESD51-6 with the board horizontal.
JA
35 32 C / W
Junction to ambient (@200 ft/min)
1, 3
Single layer
board (1s)
JMA
48 —
Four layer board
(2s2p)
JMA
32 29 C / W
Junction to board
4
4
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
JB
22 22 C / W
Junction to case
5
5
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL
SPEC-883 Method 1012.1).
JC
14 12 C / W
Junction to top of package, natural convection
1, 6
6
Thermal characterization parameter indicating the temperature difference between package top and the
junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization
parameter is written in conformance with Psi-JT.
jt
32C / W
Maximum operating junction temperature T
j
105 105
o
C
T
J
T
A
P
D
JMA
+=
P
D
K
T
J
273C+
---------------------------------
=