Datasheet
Table Of Contents
- MCF5441x ColdFire Microprocessor Data Sheet
- 1 MCF5441x family comparison
- 2 Hardware design considerations
- 3 Pin assignments and reset states
- 4 Electrical characteristics
- 4.1 Absolute maximum ratings
- 4.2 Thermal characteristics
- 4.3 ESD protection
- 4.4 Static latch-up (LU)
- 4.5 DC electrical specifications
- 4.6 Output pad loading and slew rate
- 4.7 DDR pad drive strengths
- 4.8 Oscillator and PLL electrical characteristics
- 4.9 Reset timing specifications
- 4.10 FlexBus timing specifications
- 4.11 NAND flash controller (NFC) timing specifications
- 4.12 DDR SDRAM controller timing specifications
- 4.13 USB transceiver timing specifications
- 4.14 ULPI timing specifications
- 4.15 eSDHC timing specifications
- 4.16 SIM timing specifications
- 4.17 SSI timing specifications
- 4.18 12-bit ADC specifications
- 4.19 12-bit DAC timing specifications
- 4.20 mcPWM timing specifications
- 4.21 I2C timing specifications
- 4.22 Ethernet assembly timing specifications
- 4.23 32-bit timer module timing specifications
- 4.24 DSPI timing specifications
- 4.25 SBF timing specifications
- 4.26 1-Wire timing specifications
- 4.27 General purpose I/O timing specifications
- 4.28 Rapid general purpose I/O timing specifications
- 4.29 JTAG and boundary scan timing specifications
- 4.30 Debug AC timing specifications
- 5 Package information
- 6 Product documentation
- 7 Revision history
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor 3
Peripheral Bus Controller 1
mcPWM
GPIO
4 I
2
Cs
1 Wire
Version 4 ColdFire Core
PLL
PLL
ADC – Analog-to-digital converter
BDM – Background debug module
CAU – Cryptography acceleration unit
DAC – Digital-to-analog
DSPI – DMA serial peripheral interface
eDMA – Enhanced direct memory access module
eSDHC – Enhanced Secure Digital host controller
EMAC – Enhanced multiply-accumulate unit
EPORT – Edge port module
GPIO – General purpose input/output module
I
2
C – Inter-Integrated Circuit
INTC – Interrupt controller
JTAG – Joint Test Action Group interface
mcPWM – Motor control pulse width modulator
PIT – Programmable interrupt timers
PLL – Phase locked loop module
RGPIO – Rapid GPIO
RNG – Random number generator
RTC – Real time clock
SSI – Synchronous serial interface
USB OTG – Universal Serial Bus On-the-Go controller
MCF5441x
JTAG
Crossbar Switch (XBS)
64 KB
SRAM
RGPIO
DDR2
Controller
FlexBus
USB OTG
MMU
NAND Flash
eSDHC
eDMA
L2 Switch
2 Ethernet
Controller
USB Host
4 DMA
Smart Card
Peripheral Bus Controller 0
Timers
ADC
RTC & kHz
RNG EPORT
4 PITs3 INTCs
2 FlexCANs
Controllers
Oscillator
Oscillator
2 SSIs
8 KB
Instruction
Cache
8 KB
Data
Cache
2 DSPIs
2 DSPIs
4 UARTs
2 I
2
Cs
2 DACs
Serial Boot
Facility
EMAC BDM
CAU
Hardware
Divide
6 UARTs
Note: Each of the crossbar switch masters, the FlexBus
and SDRAM controller have access to peripheral
bus controller 0, which is not shown.
