Datasheet

Electrical characteristics
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor 31
Figure 12. FlexBus write timing
4.11 NAND flash controller (NFC) timing specifications
The NAND flash controller (NFC) implements the interface to standard NAND flash memory devices. This section describes
the timing parameters of the NFC.
All NFC signals use pad type pad_fsr. The following timing specifications assume a pad slew rate setting of 11 and a load of
50 pF.
1
1.These timing parameters are specified assuming maximum operating frequency and the fastest pad slew rate setting
(11). When operating this interface at lower frequencies, increase the slew rate by using the 10, 01, or 00 setting to
increase edge rise and fall times, thus reducing EMI.
Table 17. NFC timing specifications
Num Characteristic Symbol Min Max Unit
Frequency of operation — 40
1
MHz
NF1 Clock period t
NFC
25 — ns
NF2 NFC_CLE setup time t
CLS
1.5  t
NFC
—ns
NF3 NFC_CLE hold time t
CLH
t
NFC
—ns
NF4 NFC_CE
setup time t
CS
1.5  t
NFC
—ns
NF5 NFC_CE
hold time t
CH
t
NFC
—ns
NF6 NFC_WE
pulse width t
WP
0.5  t
NFC
– 0.5 — ns
FB_CLK
FB_R/W
FB_ALE
FB_OE
S0 S2 S3
DATA
FB_TSIZ[1:0]
TSIZ[1:0]
S1
ADDR[31:X]
FB_AD[Y:0]
FB_AD[31:X]
ADDR[Y:0]
FB_CSn, FB_BE/BWEn
FB_TA
FB3
FB1
FB2
FB5
FB4
FB_TS
Note:
1
FB2 and FB3 output specifications are valid for all FB_AD[31:0], FB_R/W, FB_ALE, FB_TS,
FB_CS
n, FB_OE, FB_BE/BWEn, and FB_TSIZ[1:0].
2
FB4 and FB5 input specifications are valid for all FB_AD[31:0] and FB_TA.