Datasheet
Table Of Contents
- MCF5441x ColdFire Microprocessor Data Sheet
- 1 MCF5441x family comparison
- 2 Hardware design considerations
- 3 Pin assignments and reset states
- 4 Electrical characteristics
- 4.1 Absolute maximum ratings
- 4.2 Thermal characteristics
- 4.3 ESD protection
- 4.4 Static latch-up (LU)
- 4.5 DC electrical specifications
- 4.6 Output pad loading and slew rate
- 4.7 DDR pad drive strengths
- 4.8 Oscillator and PLL electrical characteristics
- 4.9 Reset timing specifications
- 4.10 FlexBus timing specifications
- 4.11 NAND flash controller (NFC) timing specifications
- 4.12 DDR SDRAM controller timing specifications
- 4.13 USB transceiver timing specifications
- 4.14 ULPI timing specifications
- 4.15 eSDHC timing specifications
- 4.16 SIM timing specifications
- 4.17 SSI timing specifications
- 4.18 12-bit ADC specifications
- 4.19 12-bit DAC timing specifications
- 4.20 mcPWM timing specifications
- 4.21 I2C timing specifications
- 4.22 Ethernet assembly timing specifications
- 4.23 32-bit timer module timing specifications
- 4.24 DSPI timing specifications
- 4.25 SBF timing specifications
- 4.26 1-Wire timing specifications
- 4.27 General purpose I/O timing specifications
- 4.28 Rapid general purpose I/O timing specifications
- 4.29 JTAG and boundary scan timing specifications
- 4.30 Debug AC timing specifications
- 5 Package information
- 6 Product documentation
- 7 Revision history
Electrical characteristics
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor 37
All ULPI signals use pad type pad_fsr. The following timing specifications assume a pad slew rate setting of 11 and a load of
50 pF.
1
Figure 19. ULPI timing diagram
4.15 eSDHC timing specifications
This section describes the electrical information of the eSDHC.
All eSDHC signals use pad type pad_msr. The following timing specifications assume a pad slew rate setting of 11 and a load
of 50 pF.
2
1.These timing parameters are specified assuming maximum operating frequency and the fastest pad slew rate setting
(11). When operating this interface at lower frequencies, increase the slew rate by using the 10, 01, or 00 setting to
increase edge rise and fall times, thus reducing EMI.
Table 19. ULPI interface timing
Num Characteristic Min Nominal Max Units
USB_CLKIN operating frequency — 60 — MHz
USB_CLKIN duty cycle — 50 — %
U1 USB_CLKIN clock period — 16.67 — ns
U2 Input setup (control and data) 5.0 — — ns
U3 Input hold (control and data) 1.0 — — ns
U4 Output valid (control and data) — — 9.5 ns
U5 Output hold (control and data) 1.0 — — ns
2.These timing parameters are specified assuming maximum operating frequency and the fastest pad slew rate setting
(11). When operating this interface at lower frequencies, increase the slew rate by using the 10, 01, or 00 setting to
increase edge rise and fall times, thus reducing EMI.
ULPI_DATA[7:0]
(Data Output)
ULPI_DATA[7:0]
(Data Input)
ULPI_DIR / ULPI_NXT
(Control Input)
ULPI_STP
(Control Output)
USB_CLKIN
U1
U2
U2
U3
U3
U4
U4
U5
U5