Datasheet
Table Of Contents
- MCF5441x ColdFire Microprocessor Data Sheet
- 1 MCF5441x family comparison
- 2 Hardware design considerations
- 3 Pin assignments and reset states
- 4 Electrical characteristics
- 4.1 Absolute maximum ratings
- 4.2 Thermal characteristics
- 4.3 ESD protection
- 4.4 Static latch-up (LU)
- 4.5 DC electrical specifications
- 4.6 Output pad loading and slew rate
- 4.7 DDR pad drive strengths
- 4.8 Oscillator and PLL electrical characteristics
- 4.9 Reset timing specifications
- 4.10 FlexBus timing specifications
- 4.11 NAND flash controller (NFC) timing specifications
- 4.12 DDR SDRAM controller timing specifications
- 4.13 USB transceiver timing specifications
- 4.14 ULPI timing specifications
- 4.15 eSDHC timing specifications
- 4.16 SIM timing specifications
- 4.17 SSI timing specifications
- 4.18 12-bit ADC specifications
- 4.19 12-bit DAC timing specifications
- 4.20 mcPWM timing specifications
- 4.21 I2C timing specifications
- 4.22 Ethernet assembly timing specifications
- 4.23 32-bit timer module timing specifications
- 4.24 DSPI timing specifications
- 4.25 SBF timing specifications
- 4.26 1-Wire timing specifications
- 4.27 General purpose I/O timing specifications
- 4.28 Rapid general purpose I/O timing specifications
- 4.29 JTAG and boundary scan timing specifications
- 4.30 Debug AC timing specifications
- 5 Package information
- 6 Product documentation
- 7 Revision history
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Electrical characteristics
Freescale Semiconductor44
Figure 25. SSI timing — master modes
Figure 26. SSI timing — slave modes
4.18 12-bit ADC specifications
Table 26. ADC parameters
1
Characteristic Name Min Typical Max Unit
Frequency of operation 200kHz — 12MHz
ADC clock period t
ADC
8.33 — 500 ns
Low reference voltage V
REFL
V
SS
—V
REFH
V
High reference voltage V
REFH
V
REFL
—AV
DD
V
Integral non-linearity (10% to 90% input signal range)
2
INL — ±3 — lsb
SSI_MCLK
(Output)
SSI_BCLK
(Output)
SSI_FS
(Output)
SSI_TXD
SSI_RXD
S1 S2 S2
S3
S4 S4
S5
S6
S7
S8
S8
S9 S10
S7
SSI_FS
(Input)
S9
S10
SSI_BCLK
(Input)
SSI_FS
(Input)
SSI_TXD
SSI_RXD
S11
S12
S12
S14
S15
S16
S16
S17 S18
S15
S13
SSI_FS
(Output)
S15
S16