Datasheet

MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Electrical characteristics
Freescale Semiconductor50
Figure 31. MDIO serial management channel timing diagram
4.23 32-bit timer module timing specifications
Table 35 lists timer module AC timings.
4.24 DSPI timing specifications
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with master and slave operations. Many of the
transfer attributes are programmable. Table 36 provides DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the MCF54418 Reference Manual for information on the modified transfer formats used for communicating
with slower peripheral devices.
All DSPI signals use pad type pad_msr. The following timing specifications assume a pad slew rate setting of 11 and a load of
50 pF.
1
Table 35. Timer module AC timing specifications
Name Characteristic Min Max Unit
T1 DTnIN cycle time (n =0:3) 3 — 1/f
SYS/2
T2 DTnIN pulse width (n =0:3) 1 — 1/f
SYS/2
1.These timing parameters are specified assuming maximum operating frequency and the fastest pad slew rate setting
(11). When operating this interface at lower frequencies, increase the slew rate by using the 10, 01, or 00 setting to
increase edge rise and fall times, thus reducing EMI.
Table 36. DSPI module AC timing specifications
1
Name Characteristic Symbol Min Max Unit Notes
Master Mode
— DSPI_SCK frequency f
SCK
—50MHz
DS1 DSPI_SCK cycle time t
SCK
20 — ns
2
DS2 DSPI_SCK duty cycle — (t
sck
2) – 2.0 (t
sck
2) + 2.0 ns
3
DS3 DSPI_PCSn to DSPI_SCK delay t
CSC
(t
sck
2) – 2.0 — ns
4
DS4 DSPI_SCK to DSPI_PCSn delay t
ASC
(t
sck
2) – 3.0 — ns
5
DS5 DSPI_SCK to DSPI_SOUT valid — — 5 ns
MDC (Output)
E11
MDIO (Output)
MDIO (Input)
E11
E12
E13
Valid Data
E14 E15
Valid Data
E10