Datasheet

Serial Interface
M68HC12B Family Data Sheet, Rev. 9.1
194 Freescale Semiconductor
14.2.3 SCI Register Descriptions
Control and data registers for the SCI subsystem are described here. The memory address indicated for
each register is the default address that is in use after reset. The entire 512-byte register block can be
mapped to any 2-Kbyte boundary within the standard 64-Kbyte address space.
14.2.3.1 SCI Baud Rate Control Register
Read: Anytime
Write: SBR12–SBR0 anytime; low-order byte must be written for change to take
effect — SBR15–SBR13 only in special modes
SC0BDH and SC0BDL are considered together as a 16-bit baud rate control register.
The value in SBR12–SBR0 determines the baud rate of the SCI. The desired baud rate is determined by
the following formula:
Which is equivalent to:
BR is the value written to bits SBR12–SBR0 to establish the baud rate.
NOTE
The baud rate generator is disabled until the TE or RE bit in SC0CR2
register is set for the first time after reset and/or the baud rate generator is
disabled when SBR12–SBR0 = 0.
BTST — Reserved for test function
BSPL — Reserved for test function
BRLD — Reserved for test function
Address: $00C0
Bit 7654321Bit 0
Read:
BTST BSPL BRLD SBR12 SBR11 SBR10 SBR9 SBR8
Write:
Reset:00000000
Figure 14-3. SCI Baud Rate Control Register (SC0BDH)
Address: $00C1
Bit 7654321Bit 0
Read:
SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0
Write:
Reset:00000100
Figure 14-4. SCI Baud Rate Control Register (SC0BDL)
SCI baud rate
MCLK
16 BR×
---------------------=
BR
MCLK
16 SCI baud rate×
--------------------------------------------------=