Datasheet

Serial Peripheral Interface (SPI)
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor 203
Figure 14-13. SPI Clock Format 1 (CPHA = 1)
14.3.3 SS Output
Available in master mode only, SS output is enabled with the SSOE bit in the SP0CR1 register if the
corresponding DDRS bit is set. The SS
output pin is connected to the SS input pin of the external slave
device. The SS
output automatically goes low for each transmission to select the external device and it
goes high during each idling state to deselect external devices.
Table 14-3. SS
Output Selection
DDS7 SSOE Master Mode Slave Mode
00SS
input with MODF feature SS input
01Reserved SS
input
1 0 General-purpose output SS
input
11SS
output SS input
t
L
t
T
for t
T
, t
l
, t
L
Minimum 1/2 SCK
t
I
t
L
BEGIN END
SCK (CPOL = 0)
SAMPLE I
CHANGE O
SEL SS (O)
TRANSFER
SCK (CPOL = 1)
MSB first (LSBF= 0) :
LSB first (LSBF = 1) :
MSB
LSB
LSB
MSB
Bit 5
Bit 2
Bit 6
Bit 1
Bit 4
Bit 3
Bit 3
Bit 4
Bit 2
Bit 5
Bit 1
Bit 6
CHANGE O
SEL SS (I)
MOSI PIN
MISO PIN
MASTER ONLY
MOSI/MISO