Datasheet

Byte Data Link Communications (BDLC)
M68HC12B Family Data Sheet, Rev. 9.1
232 Freescale Semiconductor
CLKS — Clock Select Bit
For J1850 bus communications to take place, the nominal BDLC operating frequency (f
BDLC
) must
always be 1.048576 MHz or 1 MHz. The CLKS register bit allows the user to select the frequency
(1.048576 MHz or 1 MHz) used to automatically adjust symbol timing.
1 = Binary frequency, 1.048576 MHz
0 = Integer frequency, 1 MHz
R1 and R0 — Rate Select Bits
These bits determine the amount by which the frequency of the MCU CGMXCLK signal is divided to
form the MUX interface clock (f
BDLC
) which defines the basic timing resolution of the MUX interface.
They may be written only once after reset, after which they become read-only bits.
The nominal frequency of f
BDLC
must always be 1.048576 MHz or 1.0 MHz for J1850 bus
communications to take place. Hence, the value programmed into these bits is dependent on the
chosen MCU system clock frequency per Table 15-2.
IE — Interrupt Enable Bit
This bit determines whether the BDLC generates CPU interrupt requests in run mode. It does not clear
BSVR interrupts when exiting the BDLC stop or BDLC wait modes. Interrupt requests are maintained
until all of the interrupt request sources are cleared by performing the specified actions upon the
BDLC’s registers (or an MCU reset sets BSVR bits to $00). Interrupts that were pending at the time
that this bit is cleared may be lost.
If the programmer does not want to use the interrupt capability of the BDLC, the BDLC state vector
register (BSVR) can be polled periodically to determine BDLC states.
1 = Enable interrupt requests from BDLC
0 = Disable interrupt requests from BDLC
WCM — Wait Clock Mode Bit
This bit determines the operation of the BDLC during CPU wait mode.
0 = Run BDLC internal clocks during CPU wait mode.
1 = Stop BDLC internal clocks during CPU wait mode.
Table 15-2. BDLC Rate Selection
f
XCLK
Frequency
R1 R0 Division
f
BDLC
1.049 MHz 0 0 1 1.049 MHz
2.097 MHz 0 1 2 1.049 MHz
4.194 MHz 1 0 4 1.049 MHz
8.389 MHz 1 1 8 1.049 MHz
1.000 MHz 0 0 1 1.00 MHz
2.000 MHz 0 1 2 1.00 MHz
4.000 MHz 1 0 4 1.00 MHz
8.000 MHz 1 1 8 1.00 MHz