Datasheet

Identifier Acceptance Filter
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor 247
When a high priority message is scheduled by the application software, it may become necessary to abort
a lower priority message being set up in one of the three transmit buffers. Because messages that are
already under transmission cannot be aborted, the user has to request the abort by setting the
corresponding abort request flag (ABTRQ) in the transmission control register (CTCR). The msCAN12
grants the request, if possible, by setting the corresponding abort request acknowledge (ABTAK) and the
TXE flag to release the buffer and by generating a transmit interrupt. The transmit interrupt handler
software can tell from the setting of the ABTAK flag whether the message was aborted (ABTAK = 1)
or sent in the meantime (ABTAK = 0).
16.4 Identifier Acceptance Filter
The identifier acceptance registers (CIDAR0–CIADAR7) define the acceptable patterns of the standard
or extended identifier (ID10–ID0 or ID28–ID0). Any of these bits can be marked don’t care in the identifier
mask registers (CIDMR0–CIDMR7).
A filter hit is indicated to the application software by:
• A set RXF (receive buffer full flag)
See 16.12.5 msCAN12 Receiver Flag Register) and
• Three bits in the identifier acceptance control register
See 16.12.9 msCAN12 Identifier Acceptance Control Register).
These identifier hit flags (IDHIT2–IDHIT0) clearly identify the filter section that caused the acceptance.
They simplify the application software’s task to identify the cause of the receiver interrupt. When more
than one hit occurs (two or more filters match), the lower hit has priority.
A flexible, programmable generic identifier acceptance filter has been introduced to reduce the CPU
interrupt loading. The filter is programmable to operate in four different modes:
1. Two identifier acceptance filters, each to be applied to the full 29 bits of the identifier and to three
bits of the CAN frame: RTR, IDE, and SRR. This mode implements two filters for a full length CAN
2.0B compliant extended identifier. Figure 16-3 shows how the first 32-bit filter bank
(CIDAR0–CIDAR3, CIDMR0–CIDMR3) produces a filter 0 hit. Similarly, the second filter bank
(CIDAR4–CUIDAR7, CIDMR4–CIDMR7) produces a filter 1 hit.
Figure 16-3. 32-Bit Maskable Identifier Acceptance Filter
CIDMR2
ID28 ID21 ID20 ID15 ID14 ID7 ID6 RTR
ID10 ID3 ID2 IDE
AC7
IDR0
IDR0
IDR1
IDR1
IDR2 IDR3
AC0 AC7 AC0 AC7 AC7AC0 AC0
AC7 AC0 AC7 AC0 AC7 AC0 AC7 AC0
CIDMRO CIDMR1 CIDMR3
CIDAR3CIDAR2CIDAR1CIDARO
ID accepted (Filter 0 hit)