Datasheet

msCAN12 Controller
M68HC12B Family Data Sheet, Rev. 9.1
268 Freescale Semiconductor
16.12.6 msCAN12 Receiver Interrupt Enable Register
WUPIE — Wakeup Interrupt Enable Bit
0 = No interrupt is generated from this event.
1 = A wakeup event results in a wakeup interrupt.
RWRNIE — Receiver Warning Interrupt Enable Bit
0 = No interrupt is generated from this event.
1 = A receiver warning status event results in an error interrupt.
TWRNIE — Transmitter Warning Interrupt Enable Bit
0 = No interrupt is generated from this event.
1 = A transmitter warning status event results in an error interrupt.
RERRIE — Receiver Error Passive Interrupt Enable Bit
0 = No interrupt is generated from this event.
1 = A receiver error passive status event results in an error interrupt.
TERRIE — Transmitter Error Passive Interrupt Enable Bit
0 = No interrupt is generated from this event.
1 = A transmitter error passive status event results in an error interrupt.
BOFFIE — Bus-Off Interrupt Enable Bit
0 = No interrupt is generated from this event.
1 = A bus-off event results in an error interrupt.
OVRIE — Overrun Interrupt Enable Bit
0 = No interrupt is generated from this event.
1 = An overrun event results in an error interrupt.
RXFIE — Receiver Full Interrupt Enable Bit
0 = No interrupt is generated from this event.
1 = A receive buffer full (successful message reception) event results in a receive interrupt.
NOTE
The CRIER register is held in the reset state when the SFTRES bit in
CMCR0 is set.
Address: $0105
Bit 7654321Bit 0
Read:
WUPIE RWRNIE TWRNIE RERRIE TERRIE BOFFIE OVRIE RXFIE
Write:
Reset:00000000
Figure 16-21. msCAN12 Receiver Interrupt Enable Register (CRIER)