Datasheet

Background Debug Mode (BDM)
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor 297
18.3.5.2 Firmware Command
The bits in the BDM instruction register have these meanings when a firmware command is executed.
H/F — Hardware/Firmware Flag
0 = Firmware control logic
1 = Hardware control logic
DATA — Data Flag
0 = No data
1 = Data included in command
R/W — Read/Write Flag
0 = Write
1 = Read
TTAGO — Trace, Tag, Go Field
REGN — Register/Next Field
Indicates which register is being affected by a command. In the case of a READ_NEXT or
WRITE_NEXT command, index register X is pre-incremented by two and the word pointed to by X is
then read or written.
Address: $FF00
Bit 7654321Bit 0
Read:
H/F DATA R/W TTAGO REGN
Write:
Reset:00000000
Figure 18-5. BDM Instruction Register (INSTRUCTION)
Table 18-5. TTAGO Decoding
TTAGO Value Instruction
00 —
01 GO
10 TRACE1
11 TAGGO
Table 18-6. REGN Decoding
TTAGO Value Instruction
000 —
001 —
010 READ/WRITE NEXT
011 PC