Datasheet

Breakpoints
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor 303
BK1RW — R/W Compare Value Bit
When BK1RWE = 1, this bit determines the type of bus cycle to match.
0 = A write cycle is matched.
1 = A read cycle is matched.
BK0RWE — R/W
Compare Enable Bit
Enables the comparison of the R/W
signal to further specify what causes a match. This bit is not useful
in program breakpoints.
0 = R/W
is not used in the comparisons.
1 = R/W
is used in comparisons.
BK0RW — R/W
Compare Value Bit
When BK0RWE = 1, this bit determines the type of bus cycle to match.
0 = Write cycle is matched.
1 = Read cycle is matched.
18.4.2.3 Breakpoint Address Register High
These bits are used to compare against the most significant byte of the address bus.
18.4.2.4 Breakpoint Address Register Low
These bits are used to compare against the least significant byte of the address bus. These bits may be
excluded from being used in the match if BK0ALE = 0.
Table 18-9. Breakpoint Read/Write Control
BK1RWE BK1RW BK0RWE BK0RW Read/Write Selected
—— 0 XR/W
is don’t care for full mode or dual mode BKP0
—— 1 0R/W
is write for full mode or dual mode BKP0
—— 1 1R/W
is read for full mode or dual mode BKP0
0X——R/W
is don’t care for dual mode BKP1
10——R/W
is write for dual mode BKP1
11——R/W
is read for dual mode BKP1
Address: $0022
Bit 7654321Bit 0
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Power on reset:00000000
Figure 18-12. Breakpoint Address Register High (BRKAH)
Address: $0023
Bit 7654321Bit 0
Read:
Bit 7654321Bit 0
Write:
Power on reset:00000000
Figure 18-13. Breakpoint Address Register Low (BRKAL)