Datasheet

Registers
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor 53
$00D2
SPI Baud Rate Register
(SP0BR)
See page 206.
Read:00000
SPR2 SPR1 SPR0
Write:
Reset:00000000
$00D3
SPI Status Register
(SP0SR)
See page 207.
Read: SPIF WCOL 0 MODF 0 0 0 0
Write:
Reset:00000000
$00D4 Reserved R R R R R R R R
$00D5
SPI Data Register
(SP0DR)
See page 207.
Read:
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Write:
Reset: Unaffected by reset
$00D6
Port S Data Register
(PORTS)
See page 208.
Read:
PS7 PS6 PS5 PS4 PS3 PS2 PS1 PS0
Write:
Reset: After reset all bits configured as general-purpose inputs
$00D7
Port S Data Direction Register
(DDRS)
See page 208.
Read:
DDS7 DDS6 DDS5 DDS4 DDS3 DDS2 DDS1 DDS0
Write:
Reset: After reset all bits configured as general-purpose inputs
$00D8 Reserved R R R R R R R R
↓
$00DA Reserved R R R R R R R R
$00DB
Port S Pullup/Reduced Drive
Register (PURDS)
See page 209.
Read: 0
RDPS2 RDPS1 RDPS0
0
PUPS2 PUPS1 PUPS0
Write:
Reset:00000000
$00DC Reserved RRRRRRRR
↓
$00DF Reserved R R R R R R R R
$00E0
Slow Mode Divider Register
(SLOW)
See page 117.
Read:00000
SLDV2 SLDV1 SLDV0
Write:
Reset:00000000
$00E1 Reserved R R R R R R R R
↓
$00EF Reserved R R R R R R R R
$00F0
EEPROM Configuration Register
(EEMCR)
See page 94.
Read:
1 1 1 1 1 EESWAI PROTLCK EERC
Write:
Reset:11111100
Addr. Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Notes:
1. Available only on MC68HC912B32 and MC68HC912BC32 devices.
2. Available only on MC68HC912B32 and MC68HC12BE32 devices.
3. Available only on MC68HC(9)12BC32 devices.
Figure 2-1. Register Map (Sheet 14 of 19)