Datasheet

Operating Modes and Resource Mapping
M68HC12B Family Data Sheet, Rev. 9.1
82 Freescale Semiconductor
Read: Anytime
Write: Once in normal modes; anytime in special modes
NDRF — Narrow Data Bus for Register-Following Map Bit
This bit enables a narrow bus feature for the 512-byte register-following map. In expanded narrow
(8-bit) modes, single-chip modes, and peripheral mode, NDRF has no effect. The register-following
map always begins at the byte following the 512-byte register map. If the registers are moved, this
space moves also.
1 = Register-following map space acts the same as an 8-bit external data bus.
0 = Register-following map space acts as a full 16-bit external data bus.
RFSTR1 and RFSTR0 — Register-Following Stretch Bits
These bits determine the amount of clock stretch on accesses to the 512-byte register-following map.
It is valid regardless of the state of the NDRF bit. In single-chip and peripheral modes, these bits have
no meaning or effect. See Table 5-3.
EXSTR1 and EXSTR0 — External Access Stretch Bit 1 and Bit 0
These bits determine the amount of clock stretch on accesses to the external address space. In
single-chip and peripheral modes, these bits have no meaning or effect.
Address:
$0013
Bit 7654321Bit 0
Read:
0 NDRF RFSTR1 RFSTR0 EXSTR1 EXSTR0 MAPROM ROMON
Write:
Reset states:
Expanded
modes:
00001100
Single-chip
modes:
00001111
Figure 5-5. Miscellaneous Mapping Control Register (MISC)
Table 5-3. Register-Following Stretch Bit Function
RFSTR1 and RFSTR0 E Clocks Stretched
00 0
01 1
10 2
11 3
Table 5-4. Expanded Stretch Bit Function
EXSTR1 and EXSTR0 E Clocks Stretched
00 0
01 1
10 2
11 3